This module provides pseudo-random values. It uses a Linear Feedback Shift Register (LFSR). It is based on the Xilinx application note XAPP052 as reference for LFSR values.
Although generating Random values is possible using the FPGA analog source, this module prefers generating pseudo-random value to improve module portability and give the opportunity to repeat the same computation for debugging.
Just configure the generic values. The output value rand_val can be used as far as rdy='1'.
If rdy='1', setting update during one clock period will generate the next value in the chain. During the computation, rdy is reset (= '0'), it goes high again as soon as computation is finished and data is available on rand_val.